| Message ID | 20250609101637.2322809-1-dario.binacchi@amarulasolutions.com |
|---|---|
| Headers |
Return-Path:
<linux-amarula+bncBCQ4XFG47UFRBDPJTLBAMGQENDUAAWY@amarulasolutions.com>
X-Original-To: linux-amarula@patchwork.amarulasolutions.com
Delivered-To: linux-amarula@patchwork.amarulasolutions.com
Received: from mail-ed1-f70.google.com (mail-ed1-f70.google.com
[209.85.208.70])
by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 8B4323F031
for <linux-amarula@patchwork.amarulasolutions.com>;
Mon, 9 Jun 2025 12:16:46 +0200 (CEST)
Received: by mail-ed1-f70.google.com with SMTP id
4fb4d7f45d1cf-6077833ae13sf2401718a12.1
for <linux-amarula@patchwork.amarulasolutions.com>;
Mon, 09 Jun 2025 03:16:46 -0700 (PDT)
ARC-Seal: i=2; a=rsa-sha256; t=1749464206; cv=pass;
d=google.com; s=arc-20240605;
b=jDt3kTzIG0zjG/Uvq8uErDKV0H28V3bb68fDh/FItECrA5ORXGBWsCH0aJhEnev/Kt
MO2qdizePEJUctuhq6U2pelxd5gG/LeBPyZhNLNaMFOmW381rLKK+rkVBhXUtnRwk0Wr
FCf8FAa9I+JJDunCfJ4NQSff9zfowOP719G0cXk1khHaW1KTW2IpVFLY05g9IZnEu/SQ
6SbSAN7BXSbgF3tWMXaPxmcQeSW5RSOsA6ypjvTktlWD7iD1omKOCVzPA1YIif7N8dwR
YmWV5u03gs/ZLE7RbpaNBpWyVZp3DyQ8rtNUG+ht3S6tu3FGMHrg2GAL5EO6CRyefLb/
VFsQ==
ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com;
s=arc-20240605;
h=list-unsubscribe:list-archive:list-help:list-post:list-id
:mailing-list:precedence:mime-version:message-id:date:subject:cc:to
:from:dkim-signature;
bh=NkFJeD3jk64RKKjIbyvSbo8JEEM0ag4tlv+xth/ZMhA=;
fh=NjPESGGoCVr/z07I9eTONWw0B1VUiKIHECA6ShJHN2Q=;
b=ZDHDth2IijtieWgzXJ3USlRkhBCZB+nWPrNLlwk5DgKw0rsXE21ig9ANncizp/C6Z3
IQMezmvlWM42T0PXzPvjA2PyPtcte/IEJHgx2C8fZCVZdofUdR9pufoLCFSN/PjaIsFf
D0/qu7SCWGuv+7REI3CDSW0mnQdn5z7AjFGZ47NOXCoJkqCkWJsEBEerFYtT2uF9oqJT
e0fX7FCJO7n/MvYTomaf+Cv3mtJ6AD1y5Pf2IJuqo1iDopZRnhgywwmmrGFHFM6oMi/A
abz706hBz+/tr8RZo8G8OiT7OYnI/imRKbSSICOgpAaigQ3E9GH+7cvvzju68INqkll5
IqVg==;
darn=patchwork.amarulasolutions.com
ARC-Authentication-Results: i=2; mx.google.com;
dkim=pass header.i=@amarulasolutions.com header.s=google
header.b=bsQ0o0mD;
spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com
designates 209.85.220.41 as permitted sender)
smtp.mailfrom=dario.binacchi@amarulasolutions.com;
dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com;
dara=pass header.i=@amarulasolutions.com
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed;
d=amarulasolutions.com; s=google; t=1749464206; x=1750069006;
darn=patchwork.amarulasolutions.com;
h=list-unsubscribe:list-archive:list-help:list-post:list-id
:mailing-list:precedence:x-original-authentication-results
:x-original-sender:mime-version:message-id:date:subject:cc:to:from
:from:to:cc:subject:date:message-id:reply-to;
bh=NkFJeD3jk64RKKjIbyvSbo8JEEM0ag4tlv+xth/ZMhA=;
b=DD0ipjpgwLjWVea8URkS2FssN5c2lkaEcdN3j5nAG6QtrgRHYRcQRxyqEu7wnGCLG9
qsr4ert7us4bpDEMmz3hbvPby5dARq3mQrBJziLHNTyf7JYlctxknllO3ZD3oI+E4yua
3rFI/N8A/mV/w625QsRUUJchdv6LxSDrIwDog=
X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed;
d=1e100.net; s=20230601; t=1749464206; x=1750069006;
h=list-unsubscribe:list-archive:list-help:list-post
:x-spam-checked-in-group:list-id:mailing-list:precedence
:x-original-authentication-results:x-original-sender:mime-version
:message-id:date:subject:cc:to:from:x-beenthere:x-gm-message-state
:from:to:cc:subject:date:message-id:reply-to;
bh=NkFJeD3jk64RKKjIbyvSbo8JEEM0ag4tlv+xth/ZMhA=;
b=oPMIuKLxP7OrniJbN60hUBHzP8K+MLk2uI3heXH2Y/XfXyMLUydoRNh/TqS4ofJ8lt
uVKmGKb6DOTx4Lh5gHuUXSiNJ5Xrjt8mf3HsfFL5aCgPCS8iJqTUR1+NqRhLrLU6/I83
P2dq1Exoh0h2RsaRVlFJpMfs8O/MUBsaA0ayVoHWaqTSLlPnJR9SVlC73zQDY4J1uHwt
KV17lE2hh3sgWFNC3Y7jo6/esoWNrcX3yyXgiRuUIUdcxJdtZWvn1PskmZ5I5avpFrsq
ORjVE0EOiEk6+/Gx9KQQqc2lKznOGlfoWQNVrWUficGqeCk4/+KxFL1Dt2Ujysr4s/VT
zP8g==
X-Forwarded-Encrypted: i=2;
AJvYcCV5uqsdtwikOskbWspmJm4agZUJhtDAhICZy/90L9slNWD8LaeD9PRWW914g/FUSO1fqEI9qbNxKcT9r21Y@patchwork.amarulasolutions.com
X-Gm-Message-State: AOJu0YwEX/5eS1Y43jf25EF/y/LUa1ctlfvUy39HJZ3u3etD2AJ+Af9r
ulupLNVX+KIjssGaZ9keIHS0g0GNltyxxtm+SCDEjVzidLK61ZTcrqUO/bzQJz+fwUhccQ==
X-Google-Smtp-Source:
AGHT+IGzwkkMDp7dwl5JgGufsZALnPHyvvynBp6xToYs3Tl7w0Tqoz+ATaBV84j+eOay6MIYYDOiog==
X-Received: by 2002:a05:6402:268e:b0:606:cef8:a028 with SMTP id
4fb4d7f45d1cf-6077479ab45mr11582392a12.22.1749464206000;
Mon, 09 Jun 2025 03:16:46 -0700 (PDT)
X-BeenThere: linux-amarula@amarulasolutions.com;
h=AZMbMZeXHUTOLYy8QzG925L82/Ls81BxpFpYC0aoq4o948we6Q==
Received: by 2002:a05:6402:350a:b0:605:d962:5e1c with SMTP id
4fb4d7f45d1cf-6072412d28cls3067169a12.0.-pod-prod-02-eu; Mon, 09 Jun 2025
03:16:44 -0700 (PDT)
X-Received: by 2002:a17:906:3916:b0:ad8:a4a8:1038 with SMTP id
a640c23a62f3a-ade1aaf8d6fmr928412166b.53.1749464203811;
Mon, 09 Jun 2025 03:16:43 -0700 (PDT)
ARC-Seal: i=1; a=rsa-sha256; t=1749464203; cv=none;
d=google.com; s=arc-20240605;
b=keXAcJVYIQVb6QxaTGJn1RJs4vpWblI2+XPJARMHEjWVzZvzCtsQBytOi7iKhiiUzT
Sigm7qo2G82+dCEZATgThQ4leypci0VtSGO3Gt14Ej7+3y9S+MsuOXSocrIs9fJbL2gj
TT6MSv4uQONrFKfoImhCFVR+9B6ItCkzo+PjWOKzQ+LSPxouvfgSzUBWhwyXFHSdDH2k
B0r3+QqVeR2UzpBhZ3X922pwNtyU0IN+MtARPUTdp1wbx09iaDGlSjyObuLgOhCi+ScL
UFmtfS/MgWYj8G3eEojpEAOEYLvOJQ5saAJYfiI1QqCBJ7yK4prEBZxHdNMTvD3snYO4
sUHw==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com;
s=arc-20240605;
h=content-transfer-encoding:mime-version:message-id:date:subject:cc
:to:from:dkim-signature;
bh=TbJ1tbrVzaq9Eu0evFfvKDOWxuNNrI779QMTpMN0PYI=;
fh=kYTDtE5k7K4Om7XMUi27ybDJNYO8vuHxl0dzQP/qx58=;
b=McfUvHq+yYf6L8U+dTPZgHJIeAV8gKRHh9/nCm7xkLUDdWMaj7WpjPL68AN0FFaefH
0IyGEFWutdnA/qF3wpaBZxPeegDksaXYc7ZxUWNl+Whxv+OGLRWpGNvM28kVAXj9rM5a
BT1bpEfABVrC0TKLC0nGe/R2TJeIdROj4DQUmqx9XbP1ibgqtRfqEDLLg5frUDHttb37
bEtwl+2Ack5EErEydodI6UsJFPl6gFJeT3ARCpYh0sZf65oFK0zU3ZAUGdhlAPadUPnZ
e67nnj2Su9S1Pr+vfVGm5KyrRHdosU16pitWHd2dHpVk07waVDGxtxanXrOw4MmQSZYI
ZaGg==;
dara=google.com
ARC-Authentication-Results: i=1; mx.google.com;
dkim=pass header.i=@amarulasolutions.com header.s=google
header.b=bsQ0o0mD;
spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com
designates 209.85.220.41 as permitted sender)
smtp.mailfrom=dario.binacchi@amarulasolutions.com;
dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com;
dara=pass header.i=@amarulasolutions.com
Received: from mail-sor-f41.google.com (mail-sor-f41.google.com.
[209.85.220.41])
by mx.google.com with SMTPS id
a640c23a62f3a-ade1db556f9sor243726866b.7.2025.06.09.03.16.43
for <linux-amarula@amarulasolutions.com>
(Google Transport Security);
Mon, 09 Jun 2025 03:16:43 -0700 (PDT)
Received-SPF: pass (google.com: domain of dario.binacchi@amarulasolutions.com
designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41;
X-Gm-Gg: ASbGnctRW8beKHo0V+t1/jm2Rqou2kXIeyvCnO2gcuivhucTtxKvbAXv5VSN/s4SMFX
gcwyhyf68V7RlWYGkP0oVLJaDrST1IjeHL/pIKVlf2i6GTVy6pYkCuHBJPlHfSDDM46e7tcxxnx
0lQemQ0DLLOd0uBwJ6PsCo9oycLxoFhACPOXIQcT3/Y9OV3XQz2Q7LMFhmrTYTliE8w5x11ugZ1
cylQDEL3TI0w7OC3TjI5pjYh36p7Pbmsjo5B1v5onFpSQCmx48+zT8Z+AFtYkv1LPECHEaGWbbI
XOZdFoA5mzJCpqBqbHUZLsu/t/X/5MJuqmh0WR7JIiSOk+O3hOeyp+S/i2JLa7QL8f2Wc0w4YRH
DLdHHWSklHYG6NliHyQU2DkPNpiQZ15QkYyHWOWin
X-Received: by 2002:a17:907:940a:b0:ad1:81c5:5ec9 with SMTP id
a640c23a62f3a-ade1a9c9e50mr1280776066b.4.1749464203323;
Mon, 09 Jun 2025 03:16:43 -0700 (PDT)
Received: from dario-ThinkPad-T14s-Gen-2i.amarulasolutions.com ([2.196.40.99])
by smtp.gmail.com with ESMTPSA id
a640c23a62f3a-ade1db55c7esm529257066b.49.2025.06.09.03.16.41
(version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);
Mon, 09 Jun 2025 03:16:42 -0700 (PDT)
From: Dario Binacchi <dario.binacchi@amarulasolutions.com>
To: linux-kernel@vger.kernel.org
Cc: linux-amarula@amarulasolutions.com,
Matteo Lisi <matteo.lisi@engicam.com>,
Dario Binacchi <dario.binacchi@amarulasolutions.com>,
Alexander Stein <alexander.stein@ew.tq-group.com>,
Andreas Kemnade <andreas@kemnade.info>,
Ard Biesheuvel <ardb@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Dmitry Baryshkov <lumag@kernel.org>,
Elinor Montmasson <elinor.montmasson@savoirfairelinux.com>,
Eric Biggers <ebiggers@google.com>,
Fabio Estevam <festevam@denx.de>,
Fabio Estevam <festevam@gmail.com>,
Francesco Dolcini <francesco.dolcini@toradex.com>,
Frieder Schrempf <frieder.schrempf@kontron.de>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Marek Vasut <marex@denx.de>,
Markus Niebel <Markus.Niebel@tq-group.com>,
"Martin K. Petersen" <martin.petersen@oracle.com>,
Max Merchel <Max.Merchel@ew.tq-group.com>,
Michael Walle <mwalle@kernel.org>,
Peng Fan <peng.fan@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Primoz Fiser <primoz.fiser@norik.com>,
Rob Herring <robh@kernel.org>,
Russell King <linux@armlinux.org.uk>,
Sascha Hauer <s.hauer@pengutronix.de>,
Shawn Guo <shawnguo@kernel.org>,
Stefan Eichenberger <stefan.eichenberger@toradex.com>,
Tim Harvey <tharvey@gateworks.com>,
devicetree@vger.kernel.org,
imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 00/10] Support Engicam MicroGEA boards
Date: Mon, 9 Jun 2025 12:15:33 +0200
Message-ID: <20250609101637.2322809-1-dario.binacchi@amarulasolutions.com>
X-Mailer: git-send-email 2.43.0
MIME-Version: 1.0
X-Original-Sender: dario.binacchi@amarulasolutions.com
X-Original-Authentication-Results: mx.google.com; dkim=pass
header.i=@amarulasolutions.com header.s=google header.b=bsQ0o0mD;
spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com
designates 209.85.220.41 as permitted sender)
smtp.mailfrom=dario.binacchi@amarulasolutions.com;
dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com;
dara=pass header.i=@amarulasolutions.com
Content-Type: text/plain; charset="UTF-8"
Precedence: list
Mailing-list: list linux-amarula@amarulasolutions.com;
contact linux-amarula+owners@amarulasolutions.com
List-ID: <linux-amarula.amarulasolutions.com>
X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com
X-Google-Group-Id: 476853432473
List-Post:
<https://groups.google.com/a/amarulasolutions.com/group/linux-amarula/post>,
<mailto:linux-amarula@amarulasolutions.com>
List-Help:
<https://support.google.com/a/amarulasolutions.com/bin/topic.py?topic=25838>,
<mailto:linux-amarula+help@amarulasolutions.com>
List-Archive:
<https://groups.google.com/a/amarulasolutions.com/group/linux-amarula/>
List-Unsubscribe:
<mailto:googlegroups-manage+476853432473+unsubscribe@googlegroups.com>,
<https://groups.google.com/a/amarulasolutions.com/group/linux-amarula/subscribe>
|
| Series |
Support Engicam MicroGEA boards
|
|
Message
Dario Binacchi
June 9, 2025, 10:15 a.m. UTC
The series adds support for Engicam MicroGEA boards: - BMM - RMM - GTW based on MicroGEA-MX6UL SoM. Changes in v2: - Change local-mac-address to 00 00 00 00 00 00. The actual value will be set by the bootloader. The previous one was assigned to Freescale Semiconductor. - Move iomuxc and iomuxc_snvs nodes to the end of the DTS files. - Drop an extra blank line from the DTS file. Dario Binacchi (10): dt-bindings: arm: fsl: support Engicam MicroGEA BMM board ARM: dts: imx6ul: support Engicam MicroGEA-MX6UL SoM ARM: dts: imx6ul: support Engicam MicroGEA BMM board ARM: imx_v6_v7_defconfig: cleanup mxs_defconfig ARM: imx_v6_v7_defconfig: select CONFIG_INPUT_PWM_BEEPER dt-bindings: arm: fsl: support Engicam MicroGEA RMM board ARM: dts: imx6ul: support Engicam MicroGEA RMM board dt-bindings: arm: fsl: support Engicam MicroGEA GTW board ARM: dts: imx6ul: support Engicam MicroGEA GTW board ARM: imx_v6_v7_defconfig: select CONFIG_USB_HSIC_USB3503 .../devicetree/bindings/arm/fsl.yaml | 9 + arch/arm/boot/dts/nxp/imx/Makefile | 3 + .../nxp/imx/imx6ull-engicam-microgea-bmm.dts | 305 +++++++++++++++ .../nxp/imx/imx6ull-engicam-microgea-gtw.dts | 163 ++++++++ .../nxp/imx/imx6ull-engicam-microgea-rmm.dts | 362 ++++++++++++++++++ .../dts/nxp/imx/imx6ull-engicam-microgea.dtsi | 96 +++++ arch/arm/configs/imx_v6_v7_defconfig | 27 +- 7 files changed, 944 insertions(+), 21 deletions(-) create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-bmm.dts create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-gtw.dts create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dts create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi
Comments
On Mon, 09 Jun 2025 12:15:33 +0200, Dario Binacchi wrote: > The series adds support for Engicam MicroGEA boards: > > - BMM > - RMM > - GTW > > based on MicroGEA-MX6UL SoM. > > Changes in v2: > - Change local-mac-address to 00 00 00 00 00 00. The actual value will > be set by the bootloader. The previous one was assigned to Freescale > Semiconductor. > - Move iomuxc and iomuxc_snvs nodes to the end of the DTS files. > - Drop an extra blank line from the DTS file. > > Dario Binacchi (10): > dt-bindings: arm: fsl: support Engicam MicroGEA BMM board > ARM: dts: imx6ul: support Engicam MicroGEA-MX6UL SoM > ARM: dts: imx6ul: support Engicam MicroGEA BMM board > ARM: imx_v6_v7_defconfig: cleanup mxs_defconfig > ARM: imx_v6_v7_defconfig: select CONFIG_INPUT_PWM_BEEPER > dt-bindings: arm: fsl: support Engicam MicroGEA RMM board > ARM: dts: imx6ul: support Engicam MicroGEA RMM board > dt-bindings: arm: fsl: support Engicam MicroGEA GTW board > ARM: dts: imx6ul: support Engicam MicroGEA GTW board > ARM: imx_v6_v7_defconfig: select CONFIG_USB_HSIC_USB3503 > > .../devicetree/bindings/arm/fsl.yaml | 9 + > arch/arm/boot/dts/nxp/imx/Makefile | 3 + > .../nxp/imx/imx6ull-engicam-microgea-bmm.dts | 305 +++++++++++++++ > .../nxp/imx/imx6ull-engicam-microgea-gtw.dts | 163 ++++++++ > .../nxp/imx/imx6ull-engicam-microgea-rmm.dts | 362 ++++++++++++++++++ > .../dts/nxp/imx/imx6ull-engicam-microgea.dtsi | 96 +++++ > arch/arm/configs/imx_v6_v7_defconfig | 27 +- > 7 files changed, 944 insertions(+), 21 deletions(-) > create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-bmm.dts > create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-gtw.dts > create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dts > create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi > > -- > 2.43.0 > > base-commit: 19272b37aa4f83ca52bdf9c16d5d81bdd1354494 > branch: imx6ull-engicam-microgea > > My bot found new DTB warnings on the .dts files added or changed in this series. Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments. If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date: pip3 install dtschema --upgrade This patch series was applied (using b4) to base: Base: using specified base-commit 19272b37aa4f83ca52bdf9c16d5d81bdd1354494 If this is not the correct base, please add 'base-commit' tag (or use b4 which does this automatically) New warnings running 'make CHECK_DTBS=y for arch/arm/boot/dts/nxp/' for 20250609101637.2322809-1-dario.binacchi@amarulasolutions.com: arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtb: cpu@0 (arm,cortex-a7): Unevaluated properties are not allowed ('fsl,soc-operating-points', 'soc-supply' were unexpected) from schema $id: http://devicetree.org/schemas/arm/cpus.yaml# arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-bmm.dtb: cpu@0 (arm,cortex-a7): Unevaluated properties are not allowed ('fsl,soc-operating-points', 'soc-supply' were unexpected) from schema $id: http://devicetree.org/schemas/arm/cpus.yaml# arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-bmm.dtb: nand-controller@1806000 (fsl,imx6q-gpmi-nand): Unevaluated properties are not allowed ('nand-ecc-mode', 'nand-ecc-step-size', 'nand-ecc-strength', 'nand-on-flash-bbt' were unexpected) from schema $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml# arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dtb: cpu@0 (arm,cortex-a7): Unevaluated properties are not allowed ('fsl,soc-operating-points', 'soc-supply' were unexpected) from schema $id: http://devicetree.org/schemas/arm/cpus.yaml# arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dtb: nand-controller@1806000 (fsl,imx6q-gpmi-nand): Unevaluated properties are not allowed ('nand-ecc-mode', 'nand-ecc-step-size', 'nand-ecc-strength', 'nand-on-flash-bbt' were unexpected) from schema $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml# arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-gtw.dtb: cpu@0 (arm,cortex-a7): Unevaluated properties are not allowed ('fsl,soc-operating-points', 'soc-supply' were unexpected) from schema $id: http://devicetree.org/schemas/arm/cpus.yaml# arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-gtw.dtb: nand-controller@1806000 (fsl,imx6q-gpmi-nand): Unevaluated properties are not allowed ('nand-ecc-mode', 'nand-ecc-step-size', 'nand-ecc-strength', 'nand-on-flash-bbt' were unexpected) from schema $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml# To unsubscribe from this group and stop receiving emails from it, send an email to linux-amarula+unsubscribe@amarulasolutions.com.
Hi Rob, On Mon, Jun 9, 2025 at 5:01 PM Rob Herring (Arm) <robh@kernel.org> wrote: > > > On Mon, 09 Jun 2025 12:15:33 +0200, Dario Binacchi wrote: > > The series adds support for Engicam MicroGEA boards: > > > > - BMM > > - RMM > > - GTW > > > > based on MicroGEA-MX6UL SoM. > > > > Changes in v2: > > - Change local-mac-address to 00 00 00 00 00 00. The actual value will > > be set by the bootloader. The previous one was assigned to Freescale > > Semiconductor. > > - Move iomuxc and iomuxc_snvs nodes to the end of the DTS files. > > - Drop an extra blank line from the DTS file. > > > > Dario Binacchi (10): > > dt-bindings: arm: fsl: support Engicam MicroGEA BMM board > > ARM: dts: imx6ul: support Engicam MicroGEA-MX6UL SoM > > ARM: dts: imx6ul: support Engicam MicroGEA BMM board > > ARM: imx_v6_v7_defconfig: cleanup mxs_defconfig > > ARM: imx_v6_v7_defconfig: select CONFIG_INPUT_PWM_BEEPER > > dt-bindings: arm: fsl: support Engicam MicroGEA RMM board > > ARM: dts: imx6ul: support Engicam MicroGEA RMM board > > dt-bindings: arm: fsl: support Engicam MicroGEA GTW board > > ARM: dts: imx6ul: support Engicam MicroGEA GTW board > > ARM: imx_v6_v7_defconfig: select CONFIG_USB_HSIC_USB3503 > > > > .../devicetree/bindings/arm/fsl.yaml | 9 + > > arch/arm/boot/dts/nxp/imx/Makefile | 3 + > > .../nxp/imx/imx6ull-engicam-microgea-bmm.dts | 305 +++++++++++++++ > > .../nxp/imx/imx6ull-engicam-microgea-gtw.dts | 163 ++++++++ > > .../nxp/imx/imx6ull-engicam-microgea-rmm.dts | 362 ++++++++++++++++++ > > .../dts/nxp/imx/imx6ull-engicam-microgea.dtsi | 96 +++++ > > arch/arm/configs/imx_v6_v7_defconfig | 27 +- > > 7 files changed, 944 insertions(+), 21 deletions(-) > > create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-bmm.dts > > create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-gtw.dts > > create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dts > > create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi > > > > -- > > 2.43.0 > > > > base-commit: 19272b37aa4f83ca52bdf9c16d5d81bdd1354494 > > branch: imx6ull-engicam-microgea > > > > > > > My bot found new DTB warnings on the .dts files added or changed in this > series. > > Some warnings may be from an existing SoC .dtsi. Yes, these warnings are generated by included .dtsi files and also appear in other boards that have already been merged into mainline. IMHO I have already addressed and fixed the warnings introduced by my boards during the tests executed before submitting the series. Thanks and regards, Dario > Or perhaps the warnings > are fixed by another series. Ultimately, it is up to the platform > maintainer whether these warnings are acceptable or not. No need to reply > unless the platform maintainer has comments. > > If you already ran DT checks and didn't see these error(s), then > make sure dt-schema is up to date: > > pip3 install dtschema --upgrade > > > This patch series was applied (using b4) to base: > Base: using specified base-commit 19272b37aa4f83ca52bdf9c16d5d81bdd1354494 > > If this is not the correct base, please add 'base-commit' tag > (or use b4 which does this automatically) > > New warnings running 'make CHECK_DTBS=y for arch/arm/boot/dts/nxp/' for 20250609101637.2322809-1-dario.binacchi@amarulasolutions.com: > > arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtb: cpu@0 (arm,cortex-a7): Unevaluated properties are not allowed ('fsl,soc-operating-points', 'soc-supply' were unexpected) > from schema $id: http://devicetree.org/schemas/arm/cpus.yaml# > arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-bmm.dtb: cpu@0 (arm,cortex-a7): Unevaluated properties are not allowed ('fsl,soc-operating-points', 'soc-supply' were unexpected) > from schema $id: http://devicetree.org/schemas/arm/cpus.yaml# > arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-bmm.dtb: nand-controller@1806000 (fsl,imx6q-gpmi-nand): Unevaluated properties are not allowed ('nand-ecc-mode', 'nand-ecc-step-size', 'nand-ecc-strength', 'nand-on-flash-bbt' were unexpected) > from schema $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml# > arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dtb: cpu@0 (arm,cortex-a7): Unevaluated properties are not allowed ('fsl,soc-operating-points', 'soc-supply' were unexpected) > from schema $id: http://devicetree.org/schemas/arm/cpus.yaml# > arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-rmm.dtb: nand-controller@1806000 (fsl,imx6q-gpmi-nand): Unevaluated properties are not allowed ('nand-ecc-mode', 'nand-ecc-step-size', 'nand-ecc-strength', 'nand-on-flash-bbt' were unexpected) > from schema $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml# > arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-gtw.dtb: cpu@0 (arm,cortex-a7): Unevaluated properties are not allowed ('fsl,soc-operating-points', 'soc-supply' were unexpected) > from schema $id: http://devicetree.org/schemas/arm/cpus.yaml# > arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-gtw.dtb: nand-controller@1806000 (fsl,imx6q-gpmi-nand): Unevaluated properties are not allowed ('nand-ecc-mode', 'nand-ecc-step-size', 'nand-ecc-strength', 'nand-on-flash-bbt' were unexpected) > from schema $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml# > > > > >