diff mbox series

[v7,10/23] dt-bindings: clock: imx8m-clock: add phandle to the anatop

Message ID 20241227165719.3902388-11-dario.binacchi@amarulasolutions.com
State New
Headers
Series Support spread spectrum clocking for i.MX8N PLLs |

Commit Message

Dario Binacchi Dec. 27, 2024, 4:56 p.m. UTC 
Adding the phandle to the anatop node will break the ABI but will allow
for a better description of the clock generation hardware, making the
dependency of CCM on anatop explicit. Indeed, the CCM receives the PLLs
generated by anatop as inputs, which, together with the oscillators,
are used to generate the clocks for the on-chip peripherals.

By doing this, it will also be possible to generalize the CCM driver
code, which will no longer require the platform's compatible string to
retrieve the anatop device node.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>

---

Changes in v7:
- New

 .../devicetree/bindings/clock/imx8m-clock.yaml         | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

'Abel Vesa' via Amarula Linux Dec. 29, 2024, 10:28 a.m. UTC | #1 
On Fri, Dec 27, 2024 at 05:56:13PM +0100, Dario Binacchi wrote:
> Adding the phandle to the anatop node will break the ABI but will allow
> for a better description of the clock generation hardware, making the
> dependency of CCM on anatop explicit. Indeed, the CCM receives the PLLs
> generated by anatop as inputs, which, together with the oscillators,
> are used to generate the clocks for the on-chip peripherals.

I don't get this. If this device (CCM?) receives PLLs, then these are
clock inputs, not a phandle.

> 
> By doing this, it will also be possible to generalize the CCM driver
> code, which will no longer require the platform's compatible string to
> retrieve the anatop device node.
> 
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> 
> ---
> 
> Changes in v7:
> - New
> 
>  .../devicetree/bindings/clock/imx8m-clock.yaml         | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml
> index c643d4a81478..b23e639e6389 100644
> --- a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml
> +++ b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml
> @@ -43,12 +43,20 @@ properties:
>        ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h
>        for the full list of i.MX8M clock IDs.
>  
> +  fsl,anatop:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description:
> +      The phandle to the anatop module that outputs the PLLs, which,
> +      along with the oscillators, are used to generate the clocks for
> +      the on-chip peripherals.

Explain how this is used by this device. If the explanation is "PLLs",
then it is wrong: PLLs are clock inputs.

Best regards,
Krzysztof

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diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml
index c643d4a81478..b23e639e6389 100644
--- a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml
+++ b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml
@@ -43,12 +43,20 @@  properties:
       ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h
       for the full list of i.MX8M clock IDs.
 
+  fsl,anatop:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      The phandle to the anatop module that outputs the PLLs, which,
+      along with the oscillators, are used to generate the clocks for
+      the on-chip peripherals.
+
 required:
   - compatible
   - reg
   - clocks
   - clock-names
   - '#clock-cells'
+  - fsl,anatop
 
 allOf:
   - if:
@@ -109,6 +117,7 @@  examples:
                  <&clk_ext3>, <&clk_ext4>;
         clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
                       "clk_ext3", "clk_ext4";
+        fsl,anatop = <&anatop>;
     };
 
   - |
@@ -120,6 +129,7 @@  examples:
                  <&clk_ext2>, <&clk_ext3>, <&clk_ext4>;
         clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1",
                       "clk_ext2", "clk_ext3", "clk_ext4";
+        fsl,anatop = <&anatop>;
     };
 
 ...