[1/6] ARM: dts: stm32: add DSI support on stm32f769
Commit Message
[backport from Linux commit a995fd2e8b3c6defd1dcdd3fb350c224e41ea1d0]
Add support for MIPI DSI Host controller. Since MIPI DSI is not
available on stm32f746, the patch adds the "stm32f769.dtsi" file
containing the dsi node inside.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---
arch/arm/dts/stm32f769-disco-u-boot.dtsi | 41 +++++++++++-------------
arch/arm/dts/stm32f769-disco.dts | 2 +-
arch/arm/dts/stm32f769.dtsi | 20 ++++++++++++
3 files changed, 39 insertions(+), 24 deletions(-)
create mode 100644 arch/arm/dts/stm32f769.dtsi
Comments
On 3/24/25 19:00, Dario Binacchi wrote:
> [backport from Linux commit a995fd2e8b3c6defd1dcdd3fb350c224e41ea1d0]
>
> Add support for MIPI DSI Host controller. Since MIPI DSI is not
> available on stm32f746, the patch adds the "stm32f769.dtsi" file
> containing the dsi node inside.
>
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> ---
>
> arch/arm/dts/stm32f769-disco-u-boot.dtsi | 41 +++++++++++-------------
> arch/arm/dts/stm32f769-disco.dts | 2 +-
> arch/arm/dts/stm32f769.dtsi | 20 ++++++++++++
> 3 files changed, 39 insertions(+), 24 deletions(-)
> create mode 100644 arch/arm/dts/stm32f769.dtsi
>
> diff --git a/arch/arm/dts/stm32f769-disco-u-boot.dtsi b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
> index add55c96e21f..c5ae753debe6 100644
> --- a/arch/arm/dts/stm32f769-disco-u-boot.dtsi
> +++ b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
> @@ -44,30 +44,25 @@
> };
> };
> };
> +};
>
> - soc {
> - dsi: dsi@40016c00 {
> - compatible = "st,stm32-dsi";
> - reg = <0x40016c00 0x800>;
> - resets = <&rcc STM32F7_APB2_RESET(DSI)>;
> - clocks = <&rcc 0 STM32F7_APB2_CLOCK(DSI)>,
> - <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>,
> - <&clk_hse>;
> - clock-names = "pclk", "px_clk", "ref";
> - bootph-all;
> - status = "okay";
> -
> - ports {
> - port@0 {
> - dsi_out: endpoint {
> - remote-endpoint = <&panel_in>;
> - };
> - };
> - port@1 {
> - dsi_in: endpoint {
> - remote-endpoint = <&dp_out>;
> - };
> - };
> +&dsi {
> + clocks = <&rcc 0 STM32F7_APB2_CLOCK(DSI)>,
> + <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>,
> + <&clk_hse>;
> + clock-names = "pclk", "px_clk", "ref";
> + bootph-all;
> + status = "okay";
> +
> + ports {
> + port@0 {
> + dsi_out: endpoint {
> + remote-endpoint = <&panel_in>;
> + };
> + };
> + port@1 {
> + dsi_in: endpoint {
> + remote-endpoint = <&dp_out>;
> };
> };
> };
> diff --git a/arch/arm/dts/stm32f769-disco.dts b/arch/arm/dts/stm32f769-disco.dts
> index d63cd2ba7eb4..ad1b442055e1 100644
> --- a/arch/arm/dts/stm32f769-disco.dts
> +++ b/arch/arm/dts/stm32f769-disco.dts
> @@ -5,7 +5,7 @@
> */
>
> /dts-v1/;
> -#include "stm32f746.dtsi"
> +#include "stm32f769.dtsi"
> #include "stm32f769-pinctrl.dtsi"
> #include <dt-bindings/input/input.h>
> #include <dt-bindings/gpio/gpio.h>
> diff --git a/arch/arm/dts/stm32f769.dtsi b/arch/arm/dts/stm32f769.dtsi
> new file mode 100644
> index 000000000000..4e7d9032149c
> --- /dev/null
> +++ b/arch/arm/dts/stm32f769.dtsi
> @@ -0,0 +1,20 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (c) 2023 Dario Binacchi <dario.binacchi@amarulasolutions.com>
> + */
> +
> +#include "stm32f746.dtsi"
> +
> +/ {
> + soc {
> + dsi: dsi@40016c00 {
> + compatible = "st,stm32-dsi";
> + reg = <0x40016c00 0x800>;
> + clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>;
> + clock-names = "pclk", "ref";
> + resets = <&rcc STM32F7_APB2_RESET(DSI)>;
> + reset-names = "apb";
> + status = "disabled";
> + };
> + };
> +};
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
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@@ -44,30 +44,25 @@
};
};
};
+};
- soc {
- dsi: dsi@40016c00 {
- compatible = "st,stm32-dsi";
- reg = <0x40016c00 0x800>;
- resets = <&rcc STM32F7_APB2_RESET(DSI)>;
- clocks = <&rcc 0 STM32F7_APB2_CLOCK(DSI)>,
- <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>,
- <&clk_hse>;
- clock-names = "pclk", "px_clk", "ref";
- bootph-all;
- status = "okay";
-
- ports {
- port@0 {
- dsi_out: endpoint {
- remote-endpoint = <&panel_in>;
- };
- };
- port@1 {
- dsi_in: endpoint {
- remote-endpoint = <&dp_out>;
- };
- };
+&dsi {
+ clocks = <&rcc 0 STM32F7_APB2_CLOCK(DSI)>,
+ <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>,
+ <&clk_hse>;
+ clock-names = "pclk", "px_clk", "ref";
+ bootph-all;
+ status = "okay";
+
+ ports {
+ port@0 {
+ dsi_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ port@1 {
+ dsi_in: endpoint {
+ remote-endpoint = <&dp_out>;
};
};
};
@@ -5,7 +5,7 @@
*/
/dts-v1/;
-#include "stm32f746.dtsi"
+#include "stm32f769.dtsi"
#include "stm32f769-pinctrl.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
new file mode 100644
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2023 Dario Binacchi <dario.binacchi@amarulasolutions.com>
+ */
+
+#include "stm32f746.dtsi"
+
+/ {
+ soc {
+ dsi: dsi@40016c00 {
+ compatible = "st,stm32-dsi";
+ reg = <0x40016c00 0x800>;
+ clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>;
+ clock-names = "pclk", "ref";
+ resets = <&rcc STM32F7_APB2_RESET(DSI)>;
+ reset-names = "apb";
+ status = "disabled";
+ };
+ };
+};