| Message ID | 20230101175740.1010258-1-dario.binacchi@amarulasolutions.com |
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[80.180.23.57]) by smtp.gmail.com with ESMTPSA id q2-20020a1709063d4200b0082ddfb47d06sm12273018ejf.148.2023.01.01.09.57.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Jan 2023 09:57:46 -0800 (PST) From: Dario Binacchi <dario.binacchi@amarulasolutions.com> To: linux-kernel@vger.kernel.org Cc: angelo@amarulasolutions.com, michael@amarulasolutions.com, tommaso.merciai@amarulasolutions.com, Chen-Yu Tsai <wenst@chromium.org>, linux-amarula@amarulasolutions.com, anthony@amarulasolutions.com, jagan@amarulasolutions.com, Dario Binacchi <dario.binacchi@amarulasolutions.com>, Abel Vesa <abelvesa@kernel.org>, Adam Ford <aford173@gmail.com>, Fabio Estevam <festevam@gmail.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Li Jun <jun.li@nxp.com>, Lucas Stach <l.stach@pengutronix.de>, Marek Vasut <marex@denx.de>, Markus Niebel <Markus.Niebel@ew.tq-group.com>, Michael Turquette <mturquette@baylibre.com>, NXP Linux Team <linux-imx@nxp.com>, Pengutronix Kernel Team <kernel@pengutronix.de>, Rob Herring <robh+dt@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, Shawn Guo <shawnguo@kernel.org>, Stephen Boyd <sboyd@kernel.org>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org Subject: [RFC PATCH v2 00/11] clk: imx8mn: setup clocks from the device tree Date: Sun, 1 Jan 2023 18:57:29 +0100 Message-Id: <20230101175740.1010258-1-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=gHsBdSkn; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: <linux-amarula.amarulasolutions.com> X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: <https://groups.google.com/a/amarulasolutions.com/group/linux-amarula/post>, <mailto:linux-amarula@amarulasolutions.com> List-Help: <https://support.google.com/a/amarulasolutions.com/bin/topic.py?topic=25838>, <mailto:linux-amarula+help@amarulasolutions.com> List-Archive: <https://groups.google.com/a/amarulasolutions.com/group/linux-amarula/> List-Unsubscribe: <mailto:googlegroups-manage+476853432473+unsubscribe@googlegroups.com>, <https://groups.google.com/a/amarulasolutions.com/group/linux-amarula/subscribe> |
| Series |
clk: imx8mn: setup clocks from the device tree
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Message
Dario Binacchi
Jan. 1, 2023, 5:57 p.m. UTC
The idea for this series was born back from Dublin (ELCE 2022) after having attended the talk entitled "Updating and Modernizing Clock Drivers" held by Chen-Yu Tsai and the availability of a board with imx8mn SOC. This series aims to setup all imx8mn's clocks from the device tree and remove the legacy setup code with hardwired parameters. I am well aware that the series lacks patches for the DT bindings. The effort up to this point has been important and so I thought I'd ask for feedback from the community before proceeding to implement them. If it is positive I will add the DT binding patches starting from version 2. The series has been tested on the BSH SystemMaster (SMM) S2 board: https://www.apertis.org/reference_hardware/imx8mn_bsh_smm_s2pro_setup Changes in v2: - Fix compiler warnings reported by kernel test robot. Dario Binacchi (11): clk: imx: add structure to extend register accesses clk: imx: add clk_hw based API imx_get_clk_hw_from_dt() clk: imx8mn: add gate driver clk: imx8mn: add mux driver clk: imx8mn: add divider driver clk: imx: pll14xx: add device tree support clk: imx: composite-8m: add device tree support clk: imx: gate2: add device tree support clk: imx: cpu: add device tree support arm64: dts: imx8mn: add dumy clock arm64: dts: imx8mn: add clocks description .../boot/dts/freescale/imx8mn-clocks.dtsi | 1885 +++++++++++++++++ arch/arm64/boot/dts/freescale/imx8mn.dtsi | 51 +- drivers/clk/imx/Makefile | 3 + drivers/clk/imx/clk-composite-8m.c | 84 + drivers/clk/imx/clk-cpu.c | 54 + drivers/clk/imx/clk-divider.c | 235 ++ drivers/clk/imx/clk-gate.c | 156 ++ drivers/clk/imx/clk-gate2.c | 86 + drivers/clk/imx/clk-imx8mn.c | 716 ++----- drivers/clk/imx/clk-mux.c | 258 +++ drivers/clk/imx/clk-pll14xx.c | 220 +- drivers/clk/imx/clk.c | 21 + drivers/clk/imx/clk.h | 15 + 13 files changed, 3177 insertions(+), 607 deletions(-) create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-clocks.dtsi create mode 100644 drivers/clk/imx/clk-divider.c create mode 100644 drivers/clk/imx/clk-gate.c create mode 100644 drivers/clk/imx/clk-mux.c
Comments
On 1/1/23 18:57, Dario Binacchi wrote: > The idea for this series was born back from Dublin (ELCE 2022) after > having attended the talk entitled "Updating and Modernizing Clock > Drivers" held by Chen-Yu Tsai and the availability of a board with > imx8mn SOC. > > This series aims to setup all imx8mn's clocks from the device tree and > remove the legacy setup code with hardwired parameters. > > I am well aware that the series lacks patches for the DT bindings. The > effort up to this point has been important and so I thought I'd ask for > feedback from the community before proceeding to implement them. If it > is positive I will add the DT binding patches starting from version 2. > > The series has been tested on the BSH SystemMaster (SMM) S2 board: > https://www.apertis.org/reference_hardware/imx8mn_bsh_smm_s2pro_setup I might be wrong, but I vaguely recall AT91 (?) had this kind of massive clock tree description in DT and they then switched to much simpler clock description where the clock topology is encoded in the driver instead (like what iMX does right now). It might be worth having a look at that and the reasoning around that conversion.
Hi Marek, On Tue, Jan 3, 2023 at 12:04 AM Marek Vasut <marex@denx.de> wrote: > > On 1/1/23 18:57, Dario Binacchi wrote: > > The idea for this series was born back from Dublin (ELCE 2022) after > > having attended the talk entitled "Updating and Modernizing Clock > > Drivers" held by Chen-Yu Tsai and the availability of a board with > > imx8mn SOC. > > > > This series aims to setup all imx8mn's clocks from the device tree and > > remove the legacy setup code with hardwired parameters. > > > > I am well aware that the series lacks patches for the DT bindings. The > > effort up to this point has been important and so I thought I'd ask for > > feedback from the community before proceeding to implement them. If it > > is positive I will add the DT binding patches starting from version 2. > > > > The series has been tested on the BSH SystemMaster (SMM) S2 board: > > https://www.apertis.org/reference_hardware/imx8mn_bsh_smm_s2pro_setup > > I might be wrong, but I vaguely recall AT91 (?) had this kind of massive > clock tree description in DT and they then switched to much simpler > clock description where the clock topology is encoded in the driver > instead (like what iMX does right now). It might be worth having a look > at that and the reasoning around that conversion. I took inspiration from Tero Kristo's work on the clock subsystem for TI platforms. I think he did a great job in both device tree definition and driver implementation. IMHO, this way the drivers are more flexible and the code can be more easily re-used on more platforms. Thanks and regards, Dario
Quoting Dario Binacchi (2023-01-01 09:57:29) > The idea for this series was born back from Dublin (ELCE 2022) after > having attended the talk entitled "Updating and Modernizing Clock > Drivers" held by Chen-Yu Tsai and the availability of a board with > imx8mn SOC. Interesting. I didn't see any mention of putting clks into DT in that presentation. > > This series aims to setup all imx8mn's clocks from the device tree and > remove the legacy setup code with hardwired parameters. Please, no! We don't want one node per clk style of bindings.
Hi On Wed, Jan 25, 2023 at 10:11 PM Stephen Boyd <sboyd@kernel.org> wrote: > > Quoting Dario Binacchi (2023-01-01 09:57:29) > > The idea for this series was born back from Dublin (ELCE 2022) after > > having attended the talk entitled "Updating and Modernizing Clock > > Drivers" held by Chen-Yu Tsai and the availability of a board with > > imx8mn SOC. > > Interesting. I didn't see any mention of putting clks into DT in that > presentation. > > > > > This series aims to setup all imx8mn's clocks from the device tree and > > remove the legacy setup code with hardwired parameters. > > Please, no! We don't want one node per clk style of bindings. I think the idea behind is: - create a way from silicon vendor to export their clock mapping with automatic exportation - reduce the copy and paste code across the drivers - avoid code duplication Is the binding a way to solve this problem? If you don't want one node per clk style bindings, did you still think that the way to go is totally wrong? Michael
Quoting Michael Nazzareno Trimarchi (2023-01-26 02:49:54) > Hi > > On Wed, Jan 25, 2023 at 10:11 PM Stephen Boyd <sboyd@kernel.org> wrote: > > > > Quoting Dario Binacchi (2023-01-01 09:57:29) > > > The idea for this series was born back from Dublin (ELCE 2022) after > > > having attended the talk entitled "Updating and Modernizing Clock > > > Drivers" held by Chen-Yu Tsai and the availability of a board with > > > imx8mn SOC. > > > > Interesting. I didn't see any mention of putting clks into DT in that > > presentation. > > > > > > > > This series aims to setup all imx8mn's clocks from the device tree and > > > remove the legacy setup code with hardwired parameters. > > > > Please, no! We don't want one node per clk style of bindings. > > I think the idea behind is: > - create a way from silicon vendor to export their clock mapping with > automatic exportation I suspect silicon vendors automatically generate their clk drivers today. > - reduce the copy and paste code across the drivers > - avoid code duplication Code duplication should be avoided. Surely the clk_ops is shared? Data duplication is the real problem here. The status quo has been to have data descriptions of clks in drivers so that drivers can turn them on. If we're trying to avoid bloat then we only enable the drivers that we care about, or make them modular so they don't waste kernel memory. If you have ideas on how to avoid duplication there then by all means implement them. Don't move the data duplication problem to devicetree though. I've been wondering if we can tag drivers that are compiled into the kernel as freeable if they aren't ever going to probe because they're for some SoC that isn't present. That would allow us to shed various builtin clk drivers on systems instead of forcing us to make everything a module. > > Is the binding a way to solve this problem? Don't think so. > If you don't want one node > per clk style bindings, did you still think that the way > to go is totally wrong? Yes.
Hi On Fri, Feb 10, 2023 at 11:49 PM Stephen Boyd <sboyd@kernel.org> wrote: > > Quoting Michael Nazzareno Trimarchi (2023-01-26 02:49:54) > > Hi > > > > On Wed, Jan 25, 2023 at 10:11 PM Stephen Boyd <sboyd@kernel.org> wrote: > > > > > > Quoting Dario Binacchi (2023-01-01 09:57:29) > > > > The idea for this series was born back from Dublin (ELCE 2022) after > > > > having attended the talk entitled "Updating and Modernizing Clock > > > > Drivers" held by Chen-Yu Tsai and the availability of a board with > > > > imx8mn SOC. > > > > > > Interesting. I didn't see any mention of putting clks into DT in that > > > presentation. > > > > > > > > > > > This series aims to setup all imx8mn's clocks from the device tree and > > > > remove the legacy setup code with hardwired parameters. > > > > > > Please, no! We don't want one node per clk style of bindings. > > > > I think the idea behind is: > > - create a way from silicon vendor to export their clock mapping with > > automatic exportation > > I suspect silicon vendors automatically generate their clk drivers > today. > Was easy to think that creating tools for dts generation was easy to have because they don't depend on the internal linux kernel and they are formally described. Export clk drivers considering kernel internal change I don't think that can work. > > - reduce the copy and paste code across the drivers > > - avoid code duplication > > Code duplication should be avoided. Surely the clk_ops is shared? Data > duplication is the real problem here. The status quo has been to have The idea to have in dts was to have much less code by the end to handle different SoC vendors but as you pointed me seems that you are more concerned about data duplication. > data descriptions of clks in drivers so that drivers can turn them on. > If we're trying to avoid bloat then we only enable the drivers that we > care about, or make them modular so they don't waste kernel memory. > I'm not an expert of the dtc compiler but, is that possible that some optimization can happen there in the feature? > If you have ideas on how to avoid duplication there then by all means > implement them. Don't move the data duplication problem to devicetree > though. > We will sit together again ;) after your comments here > I've been wondering if we can tag drivers that are compiled into the > kernel as freeable if they aren't ever going to probe because they're > for some SoC that isn't present. That would allow us to shed various > builtin clk drivers on systems instead of forcing us to make everything > a module. This is general on the driver level but sounds like a good idea. Michael > > > > > Is the binding a way to solve this problem? > > Don't think so. > > > If you don't want one node > > per clk style bindings, did you still think that the way > > to go is totally wrong? > > Yes.