[06/26] clk: imx8mn: Mark IMX8MN_SYS_PLL2 and IMX8MN_SYS_PLL3 as enabled
diff mbox series

Message ID 20240913095622.72377-7-dario.binacchi@amarulasolutions.com
State New
Headers show
Series
  • Support display (and even more) on the BSH SMM S2/PRO boards
Related show

Commit Message

Dario Binacchi Sept. 13, 2024, 9:55 a.m. UTC 
From: Michael Trimarchi <michael@amarulasolutions.com>

Both clock are enabled by the bootloader and we need to increase their
reference count to avoid disable during reparent operation.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---

 drivers/clk/imx/clk-imx8mn.c | 8 ++++++++
 1 file changed, 8 insertions(+)

Patch
diff mbox series 

diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index c96a2ebaa19a..449ebf2d0733 100644
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -154,6 +154,7 @@  static const char * const imx8mn_usb_phy_sels[] = {"clock-osc-24m", "sys_pll1_10
 static int imx8mn_clk_probe(struct udevice *dev)
 {
 	struct clk osc_24m_clk;
+	struct clk *clk;
 	void __iomem *base;
 	int ret;
 
@@ -420,6 +421,13 @@  static int imx8mn_clk_probe(struct udevice *dev)
 	clk_dm(IMX8MN_CLK_ECSPI3_ROOT,
 	       imx_clk_gate4("ecspi3_root_clk", "ecspi3", base + 0x4090, 0));
 #endif
+	ret = clk_get_by_id(IMX8MN_SYS_PLL2, &clk);
+	if (!ret)
+		clk_enable(clk);
+
+	ret = clk_get_by_id(IMX8MN_SYS_PLL3, &clk);
+	if (!ret)
+		clk_enable(clk);
 
 	clk_dm(IMX8MN_CLK_ARM,
 	       imx_clk_mux2_flags("arm_core", base + 0x9880, 24, 1,